Micron Q3 FY2026: Record Revenue, Record Margins — Why Memory Is the New Oil
By FurlPay Research · Jul 2, 2026 · 7 min read
For two decades, memory was the commodity corner of semiconductors — brutal cycles, thin margins, price-takers. Micron's fiscal Q3 2026 print ends that framing for good. Revenue of $41.46 billion and EPS of $25.11 — up 346% year over year — landed on gross margins of 84.9%, numbers that look more like enterprise software than DRAM. High-bandwidth memory (HBM) for AI accelerators did this: every HBM4 wafer Micron can cut is pre-sold, with supply effectively booked out into 2027.
| Metric | Actual | Estimate | Surprise |
|---|---|---|---|
| Revenue | $41.46B | $33.9B | +22.3% |
| EPS (diluted) | $25.11 | $18.40 | +36.5% |
| Gross margin | 84.9% | 71.2% | +13.7pp |
| HBM revenue mix | ~58% | ~45% | +13pp |
| Q4 revenue guide | $46–48B | $38.1B | raised |
Why memory became the bottleneck
Every generation of AI accelerator is increasingly memory-bound: model weights, KV caches and context windows all scale faster than compute. NVIDIA's and Broadcom's 2026 accelerator lineups attach 2–3× more HBM per package than their 2024 parts. With only three HBM suppliers on earth and yields still hard, pricing power flipped to the memory makers — the "new oil" isn't a metaphor about importance, it's about who sets the price at the margin.
- Sold out into 2027 — management confirmed HBM4 capacity is fully allocated, with long-term agreements covering >80% of next year's output.
- Margins are structural, not cyclical — HBM is co-designed with each accelerator, making it sticky, qualified, multi-year revenue.
- Capex discipline held — Micron raised capex only modestly, prioritising yield over wafer starts, which protects pricing.
Record quarter, sold-out HBM into 2027, guidance raised ~25% above street. The structural-margin thesis is intact.
Price target · MU
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Read-throughs for the AI complex
A sold-out memory supply chain is bullish for accelerator vendors' pricing (NVDA, AVGO) but a real constraint on unit growth into 2027 — watch for that tension in NVIDIA's August print. Server integrators (SMCI, DELL) inherit longer lead times, and conventional storage (WDC, STX) is quietly benefiting as HBM crowds out NAND/DRAM capacity. The bottleneck has moved: compute is abundant, packaged memory is not.
The scarce resource of the AI buildout is no longer FLOPs. It's qualified, packaged, high-bandwidth memory — and there are only three companies on earth that make it.
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